China plans to produce the most powerful 1600-core chips: engineers have already achieved this

Analysts say the Chinese could use the massive processors to build advanced supercomputers, but they would be difficult to program.

Scientists from the Institute of Computer Technology of the Chinese Academy of Sciences have introduced the improved 256-core chipset and plan to scale it to 1,600 cores, making it possible to use the entire wafer as a single computing device. The Tom’s Hardware website reports this.

Currently, only the American company Cerebras has been able to create a multi-chip design that allows the entire silicon wafer to be used as a single large chip. However, China is also interested in the development of this technology. Therefore, the Institute of Computer Technology of the Chinese Academy of Sciences recently presented an improved 256-core multi-chip computing system called Zhejiang Big Chip.

Its design consists of 16 chips, each containing 16 RISC-V cores, connected together via traditional symmetric multiprocessing (SMP) using on-chip networking so the chips can share memory. Each chiplet has various interchip interfaces to connect to neighboring chiplets via a 2.5D intermediary. The researchers say their design scales up to 100 chips, which is equivalent to 1,600 cores.

Semiconductor Manufacturing International Corp. of Zhejiang chipsets. It is reported that it is produced by 22 nm process technology. (SMIC).

“We don’t know how much power such a 1600-core setup would consume, but scientists can optimize power consumption and performance by reducing latency,” the material says.

The researchers note that multi-chip designs could be used to create processors for high-end supercomputers; That’s what AMD and Intel are doing today. Meanwhile, Chinese researchers propose using a multi-level memory hierarchy for such mechanisms; this can potentially cause difficulties in programming such devices.

“The memory hierarchy includes main memory [кэши], onboard, and off-chip memory,” says the statement. “The three memory levels differ in bandwidth, latency, power consumption, and cost. An overview of the hierarchical chiplet architecture shows that multiple cores are connected via a pass-through switch and share a common cache. This ,forms the structure of the module, and the module is ,connected to each other through a network within the chiplet.,Several modules form a chip, and the chip is interconnected ,through an inter-chip network and then connected to external (let)memory.,Taking full advantage of such a hierarchy requires careful design. “Intelligent use of memory bandwidth to balance the workload of different computing hierarchies can significantly increase the efficiency of the chiplet system. “Proper design of network resources can enable chiplets to perform shared memory tasks together.”

Big Chip design can also take advantage of things like electro-optical computing, near-memory computing, and 3D multi-level memory. However, the document does not provide specific implementation details of these technologies or solutions to the problems they may present when designing and building such complex systems.

The Next Platform website claims that the Chinese Academy of Sciences has already created the 256-core Zhejiang Big Chip multi-chip computing complex. From there, a company can examine the performance of its chip design and then decide whether to build a system with more cores, different memory classes, and chip-scale integration.

It was previously written that, according to analysts, China can produce 25 billion chips per month. For this purpose, 18 new factories will be established in the country.

Other researchers from Canada recently denied that China has learned to make processors using 5-nanometer process technology. Apparently the HiSilicon Kirin 9006C chips found in Huawei laptops are printed in Taiwan.

Source: Focus

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